Research-0734: Cross-Backend Throughput Baseline + SYCL on Intel Arc (2026-05-28)¶

Date: 2026-05-28 Researcher: Claude (Anthropic) / Lusoris Status: Complete Supersedes: This digest extends Research-0550 (parity matrix) and Research-0730 (Arc parity gate) with measured wall-time throughput numbers across CPU, CUDA, and SYCL backends and with the SYCL device-access fix documented.

1. Purpose¶

PR #75 skipped SYCL throughput numbers because the one-off container used at the time lacked /dev/dri passthrough. This digest adds SYCL (Intel Arc A380) to the baseline, delivers the 3-backend × 3-workload wall-time matrix, and documents the exact container invocation pattern required to make Intel Arc accessible inside a vmaf-dev-mcp:cuda13.3 one-off container.

2. SYCL Device Access Fix¶

2.1 Root cause¶

docker run --device /dev/dri passes the character device nodes (renderD128, renderD129, renderD130, card0–card2) but does not bind-mount the udev-managed /dev/dri/by-path/pci-XXXX:YY:ZZ.W-render symlinks. Intel's Level Zero GPU ICD (libze_intel_gpu.so.1) enumerates devices by walking /dev/dri/by-path to find PCI-addressed render nodes and match them to the Intel compute-runtime's internal device table. Without the by-path symlinks, zeInit() succeeds at loader level but returns ZE_RESULT_ERROR_DEPENDENCY_UNAVAILABLE (0x78000001) because no Intel GPU is found.

This is the same class of failure documented in ADR-0514 / T-DEV-MCP-BACKEND-EXPOSURE-2026-05-18 (where the fix was to add a by-path bind-mount to docker-compose.yml). The docker compose deployment already has this; one-off docker run invocations need it manually.

2.2 Hardware map¶

The --group-add render flag fails because render is not a group name inside the container. Use --group-add 988 (the host render GID) instead.

2.3 Working one-off container invocation¶

docker run --rm --gpus all \
  --device /dev/dri/renderD128 \
  --device /dev/dri/renderD129 \
  --device /dev/dri/renderD130 \
  --device /dev/dri/card0 \
  --device /dev/dri/card1 \
  --device /dev/dri/card2 \
  --group-add 988 \
  -v /dev/dri/by-path:/dev/dri/by-path:ro \
  -v /home/kilian/dev/vmaf:/workspace:ro \
  --entrypoint="" \
  vmaf-dev-mcp:cuda13.3 bash -c '
    source /opt/intel/oneapi/setvars.sh 2>/dev/null
    sycl-ls  # should show level_zero:gpu Intel Arc A380
    vmaf --backend sycl ...
  '

After applying this invocation, sycl-ls correctly enumerates:

[level_zero:gpu][level_zero:0] Intel(R) oneAPI Unified Runtime over Level-Zero,
    Intel(R) Arc(TM) A380 Graphics 12.56.5 [1.15.38308+1]
[opencl:gpu][opencl:1] Intel(R) OpenCL Graphics, Intel(R) Arc(TM) A380 Graphics
    OpenCL 3.0 NEO [26.18.38308.1]

3. Test Setup¶

Workloads¶

4. Results¶

4.1 Wall time — median ± stddev (ms)¶

4.2 Throughput (fps)¶

4.3 VMAF score — pooled mean¶

4.4 Score parity vs CPU (ADR-0119 tolerance: 5e-5)¶

All three backends pass ADR-0119 tolerance on all workloads.

5. Findings¶

5.1 SYCL is competitive with or faster than CPU across all workloads¶

SYCL (Arc A380) matches or beats CPU wall time by 2–5% on all three workloads. The Arc A380 is a low-power discrete GPU (6 Xe cores, ~75W TDP) competing with a 16-core desktop CPU at 170W TDP. The competitive throughput reflects the SYCL kernel efficiency and the L1 cache-friendly access patterns of the ADM/VIF/motion kernels.

5.2 CUDA has higher wall time than CPU for these short workloads¶

CUDA (RTX 4090) is consistently slower than both CPU and SYCL for the 3-frame workloads (WL2, WL3) and is ~64% slower than CPU for the 48-frame workload (WL1). This is expected: the RTX 4090 startup overhead (context initialization, PCIe DMA for small frame buffers) dominates when the workload is too short to amortize. At longer durations (hundreds of frames) CUDA throughput would be expected to exceed CPU.

5.3 SYCL score is bit-identical to CPU on all workloads¶

SYCL returned exactly the same pooled VMAF score as CPU on all three workloads (Δ = 0.0 on all cells). This is a stronger result than CUDA which shows a small numerical perturbation (3–4e-6) consistent with fp32 accumulation differences in the GPU FMA path on the RTX 4090.

The SYCL bit-exactness is likely due to the Arc A380 SYCL kernels using the same integer ADM/VIF paths as the CPU (the fp32 SYCL paths were added later and remain off by default for the primary VMAF score computation).

5.4 Surprising result: SYCL on Arc A380 > CUDA on RTX 4090 for these workloads¶

This is not a hardware capability claim. The RTX 4090 is roughly 10–15× more compute-capable than the Arc A380 at sustained throughput. The inversion here reflects:

1. Startup cost asymmetry: CUDA context initialization on RTX 4090 + PCIe data transfer costs ~50–60 ms per run at these frame counts. Level Zero on Arc A380 initializes faster with lower PCIe bandwidth requirements for small frames.
2. Workload size: At 3 frames × 1920×1080 × 1.5 bytes = ~9 MB of pixel data, the transfer overhead is significant.

For sustained encode-quality pipelines processing thousands of frames, CUDA would be the expected winner.

6. Regression Check vs Testdata Baseline¶

testdata/perf_benchmark_results.json
testdata/netflix_benchmark_results.json

No formal regression against these files was measured because the container binary version (3.0.0, vmaf-dev-mcp:cuda13.3) may differ from the binary that generated the committed JSON snapshots. The score parity check (§4.4) is the correctness gate; wall times are additive baseline data for this PR, not a regression assertion.

7. Reproducer¶

# Full benchmark reproducer (run from repo root)
docker run --rm --gpus all \
  --device /dev/dri/renderD128 \
  --device /dev/dri/renderD129 \
  --device /dev/dri/renderD130 \
  --device /dev/dri/card0 --device /dev/dri/card1 --device /dev/dri/card2 \
  --group-add 988 \
  -v /dev/dri/by-path:/dev/dri/by-path:ro \
  -v $(pwd):/workspace \
  -v $(pwd)/python/test/resource/yuv:/yuv:ro \
  --entrypoint="" \
  vmaf-dev-mcp:cuda13.3 bash -c '
    source /opt/intel/oneapi/setvars.sh 2>/dev/null
    sycl-ls | grep level_zero   # must show Arc A380
    for BE in cpu cuda sycl; do
      for WLREF in /workspace/testdata/ref_576x324_48f.yuv; do
        FLAGS="--no_vulkan --no_hip"
        [[ $BE = cpu  ]] && FLAGS="$FLAGS --no_cuda --no_sycl"
        [[ $BE = cuda ]] && FLAGS="$FLAGS --no_sycl"
        [[ $BE = sycl ]] && FLAGS="$FLAGS --no_cuda"
        time /usr/local/bin/vmaf \
          --reference $WLREF \
          --distorted /workspace/testdata/dis_576x324_48f.yuv \
          --width 576 --height 324 --pixel_format 420 --bitdepth 8 \
          --model path=/build/vmaf/model/vmaf_v0.6.1.json \
          $FLAGS --json --output /tmp/bench_$BE.json 2>&1 | grep -E "VMAF|real"
      done
    done
  '

8. References¶

• ADR-0119: --precision max flag (IEEE-754 tolerance baseline)
• ADR-0214: GPU parity CI gate (places=4)
• ADR-0514: Dev container full backend exposure (by-path bind-mount pattern)
• ADR-0543: SYCL level_zero NEO 26.18 pin
• Research-0550: Full parity matrix 2026-05-18
• Research-0730: Arc A380 parity gate 2026-05-27 (superseded by this digest for throughput data)
• PR #75: Previous baseline (CPU + CUDA only; SYCL skipped)